? semiconductor components industries, llc, 2001 june, 2001 rev. 1 1 publication order number: mc74act640/d mc74act640 octal 3-state inverting transciever1 the mc74act640 octal bus transceiver is designed for asynchronous two-way communication between data buses. the device transmits data from bus a to bus b when t/r = high, or from bus b to bus a when t/r = low. the enable input can be used to disable the device so the buses are effectively isolated. ? bidirectional data path ? a and b outputs sink 24 ma/source 24 ma ? ttl compatible inputs 19 20 18 16 15 14 2 1 34567 v cc 13 8 12 9 11 10 oe b 0 b 1 b 2 b 3 b 4 b 5 b 6 b 7 t/r a 0 a 1 a 2 a 3 a 4 a 5 a 6 a 7 gnd 17 figure 1. pinout: 20lead packages conductors (top view) pin assignment pin function a 0 a 7 side a inputs or 3-state outputs oe output enable input t/r transmit/receive input b 0 b 7 side b inputs or 3-state outputs truth table oe t/r applied inputs valid direction i/p o/p output h x x x x l h h a to b l l h l a to b h l l h b to a l l l l b to a h h = high voltage level l = low voltage level x = immaterial http://onsemi.com 1 20 pdip20 n suffix case 738 1 20 1 20 1 20 so20 dw suffix case 751 tssop20 dt suffix case 948e eiaj20 m suffix case 967 device package shipping ordering information mc74act640n pdip20 18 units/rail mc74act640dw soic20 38 units/rail mc74ac640dwr2 soic20 1000 tape & reel mc74ac640dt tssop20 75 units/rail mc74act640dtr2 tssop20 2500 tape & reel mc74act640m eiaj20 40 units/rail mc74ac640mel eiaj20 2000 tape & reel see general marking information in the device marking section on page 5 of this data sheet. device marking information
mc74act640 http://onsemi.com 2 maximum ratings (note 1) symbol parameter value unit v cc dc supply voltage 0.5 to 7.0 v v i dc input voltage 0.5 v i v cc 0.5 v v o dc output voltage (note 2) 0.5 v o v cc 0.5 v i ik dc input diode current 20 ma i ok dc output diode current 50 ma i o dc output sink/source current 50 ma i cc dc supply current per output pin 50 ma i gnd dc ground current per output pin 50 ma t stg storage temperature range 65 to 150 c t l lead temperature, 1 mm from case for 10 seconds 260 c t j junction temperature under bias 150 c ja thermal resistance pdip soic tssop 67 96 128 c/w p d power dissipation in still air at 85 c pdip soic tssop 750 500 450 mw msl moisture sensitivity level 1 f r flammability rating oxygen index: 30% 35% ul 94 v0 @ 0.125 in v esd esd withstand voltage human body model (note 3) machine model (note 4) charged device model (note 5) > 2000 > 200 > 1000 v i latchup latchup performance above v cc and below gnd at 85 c (note 6) 100 ma 1. absolute maximum continuous ratings are those values beyond which damage to the device may occur. extended exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. functional operation under absolute maximumrated conditions is not implied. 2. i o absolute maximum rating must be observed. 3. tested to eia/jesd22a114a. 4. tested to eia/jesd22a115a. 5. tested to jesd22c101a. 6. tested to eia/jesd78. recommended operating conditions symbol parameter min typ max unit v cc dc input voltage (referenced to gnd) 4.5 5.5 v v in , v out dc input voltage, output voltage (referenced to gnd) 0 v cc v t a operating temperature, all package types 40 25 +85 c t r , t f input rise and fall time (note 8) v cc = 4.5 v 0 10 10 ns/v t r , t f in ut rise and fall time (note 8) v cc = 4 . 5 v v cc = 5.5 v 0 0 10 8.0 10 8.0 ns/v t j junction temperature (pdip) 140 c i oh output current high 24 ma i ol output current low 24 ma 7. unused inputs may not be left open. all inputs must be tied to a high voltage level or low logic voltage level. 8. v in from 0.8 v to 2.0 v; refer to individual data sheets for devices that differ from the typical input rise and fall times.
mc74act640 http://onsemi.com 3 dc characteristics t a = +25 c t a = 40 c to +85 c symbol parameter v cc (v) typ guaranteed limits unit conditions v ih minimum high level i nput voltage 4.5 5.5 1.5 1.5 2.0 2.0 2.0 2.0 v v v out = 0.1 v or v cc 0.1 v v il maximum low level input voltage 4.5 5.5 1.5 1.5 0.8 0.8 0.8 0.8 v v v out = 0.1 v or v cc 0.1 v v oh minimum high level output voltage 4.5 5.5 4.49 5.49 4.4 5.4 4.4 5.4 v v i out = 50 m a 4.5 5.5 3.86 4.86 3.76 4.76 v v *v in = v il or v ih 24 ma i oh 24 ma v ol maximum low level output voltage 4.5 5.5 0.001 0.001 0.1 0.1 0.1 0.1 v v i out = 50 m a 4.5 5.5 0.36 0.36 0.44 0.44 v v *v in = v il or v ih 24 ma i oh 24 ma i in maximum input leakage current 5.5 0.1 1.0 m a v i = v cc , gnd i cct additional max. i cc /input 5.5 0.6 1.5 ma v i = v cc 2.1 v i oz maximum 3state current 5.5 0.5 5.0 m a v i (oe) = v il , v ih v i = v cc , gnd v o = v cc , gnd i old i ohd 2minimum dynamic output current 5.5 5.5 75 75 ma ma v old = 1.65 v max i cc maximum quiescent supply current 5.5 8.0 80 m a v in = v cc or gnd *all outputs loaded; thresholds on input associated with output under test. 2maximum test duration 2.0 ms, one output loaded at a time. ac characteristics t r = t f = 3.0 ns (for figures and waveforms, see figures 2 and 3.) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf symbol parameter v cc * (v) min max min max unit t plh propagation delay an to bn or bn to an 5.0 1.5 8.0 1.0 8.5 ns t phl propagation delay an to bn or bn to an 5.0 1.5 8.0 1.0 9.0 ns t pzh output enable time oe to an or bn 5.0 1.5 10.0 1.0 11.0 ns t pzl output enable time oe to an or bn 5.0 1.5 10.0 1.0 11.0 ns t phz output disable time t/r or oe to an or bn 5.0 1.5 10.0 1.0 11.0 ns t plz output disable time t/r or oe to an or bn 5.0 1.5 10.0 1.0 11.0 ns *voltage range 5.0 v is 5.0 v 0.5 v capacitance symbol parameter value typ unit test conditions c in input capacitance 4.5 pf v cc = 5.0 v c i/o input/output capacitance 15 pf v cc = 5.0 v c pd power dissipation capacitance 45 pf v cc = 5.0 v
mc74act640 http://onsemi.com 4 switching waveforms 10% figure 2. figure 3. *includes all probe and jig capacitance c l * 50 scope test point device under test output figure 4. test circuit 450 input 3.0 v gnd 50% 50% input a or b output a or b t plh t phl 90% 10% 90% t thl t tlh t r t f 50% 50% 50% gnd v ol v oh a or b a or b t pzl t plz t pzh t phz high impedance oe 10% 90% high impedance 3.0 v 3.0 v gnd t/r
mc74act640 http://onsemi.com 5 marking diagrams23 pdip20 so20 tssop20 eiaj20 act 640 alyw act640 awlyyww mc74act640n awlyyww 74act640 awlyww a = assembly location wl, l = wafer lot yy, y = year ww, w = work week package dimensions pdip20 n suffix 20 pin plastic dip package case 73803 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension b does not include mold flash. m l j 20 pl m b m 0.25 (0.010) t dim min max min max millimeters inches a 25.66 27.17 1.010 1.070 b 6.10 6.60 0.240 0.260 c 3.81 4.57 0.150 0.180 d 0.39 0.55 0.015 0.022 g 2.54 bsc 0.100 bsc j 0.21 0.38 0.008 0.015 k 2.80 3.55 0.110 0.140 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.51 1.01 0.020 0.040 e 1.27 1.77 0.050 0.070 1 11 10 20 a seating plane k n f g d 20 pl t m a m 0.25 (0.010) t e b c f 1.27 bsc 0.050 bsc
mc74act640 http://onsemi.com 6 package dimensions so20 dw suffix 20 pin plastic soic package case 751d05 issue f 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition. tssop20 dt suffix 20 pin plastic tssop package case 948e02 issue a dim a min max min max inches 6.60 0.260 millimeters b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-. 110 11 20 pin 1 ident a b t 0.100 (0.004) c d g h section nn k k1 jj1 n n m f w seating plane v u s u m 0.10 (0.004) v s t 20x ref k l l/2 2x s u 0.15 (0.006) t detail e 0.25 (0.010) detail e 6.40 0.252 --- --- s u 0.15 (0.006) t
mc74act640 http://onsemi.com 7 package dimensions eiaj20 m suffix 20 pin plastic eiaj package case 96701 issue o dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 12.35 12.80 0.486 0.504 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.81 --- 0.032 a 1 h e q 1 l e 10 0 10 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). h e a 1 l e q 1 c a z d e 20 110 11 b m 0.13 (0.005) e 0.10 (0.004) view p detail p m l a b c d e e l m z
mc74act640 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc74act640/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada
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